Adapted Near-State PWM for Dual Two-Level Inverters in Order to Reduce Common-Mode Voltage and Switching Losses
IET Power Electronics
In this paper, a near-state pulse-width modulation (NSPWM) algorithm is proposed and implemented on dual-two-level voltage-source inverters (D2L-VSIs) in order to reduce the common-mode voltage (CMV), the inverter switching losses, the current total harmonic distortion, and the side effects of bearing currents --compared with space vector modulation (SVM) and PWM7. To gain these goals, two conventional two-level inverters of the D2L-VSI are controlled, separately, with specific switching sequences and an adjusted phase difference between the carriers of two inverters. For evaluating and comparing these PWM techniques mathematically, both CMV root mean square generated and switching losses of the D2L-VSI are formulated as a function of the power factor of the D2L-VSI, which is driven by the methods detailed in this study. Eventually, theories and analysis, as well as simulations and experimental results --which are generated by MATLAB/Simulink environment and a 300 W scaled-down D2LVSI prototype, respectively --authenticate the superiority of the proposed NSPWM over both SVM and PWM7.
Aghazadeh, Amir, Naser Khodabakhshi-Javinani, Hamed Nafisi, Masoud Davari, Edris Pouresmaeil.
"Adapted Near-State PWM for Dual Two-Level Inverters in Order to Reduce Common-Mode Voltage and Switching Losses."
IET Power Electronics, 12 (4): 676-685.